The present invention relates to a method for selecting cells in response to input codes of a digital-to-analog converter.
FIG. 3 shows one example of a 4-bit current output type digital-to-analog converter. In FIG. 3, the current output type digital-to-analog converter provides current source cells 1-15 as fifteen output cells. Each of the current source cells 1-15 is connected to either of a first analog output line L1 or a second analog output line L2 as a changeover switch SW disposed respectively is selectively operated in accordance with digital data. In other words, when a predetermined number of current source cells are selected in response to input codes (digital data), the changeover switches SW for the selected current source cells are switched. This causes the output currents from the selected current source cells to be output via the changeover switches SW to the second analog output line L2, respectively.
The current output type digital-to-analog converter is formed on a semiconductor chip, and the respective current source cells are also formed on the chip. Thus, during the manufacturing process, it is difficult to manufacture all the current source cells formed on the chip with the same degree of precision. That is, there are some limitations, in terms of the manufacturing process, for outputting the same output currents for all the current source cells.
In this way, it is difficult to output the same output current from all the current source cells; as such, if current source cells to be selected in response to the input code are determined univocally, analog values relative to digital values do not become linear. Thus, a DWA (Data Weighted Averaging) technique has been proposed as a method for selecting current source cells in response to the input code.
The DWA technique is briefly described with reference to FIG. 4. FIG. 4 shows a 4-bit current output type digital-to-analog converter having fifteen current source cells 1-15 shown in FIG. 3, where the respective current source cells 1-15 are represented by square boxes. It should be appreciated that current source cells selected are shaded with slant lines. In FIG. 4, when the input code xe2x80x9cinxe2x80x9d is xe2x80x9c1xe2x80x9dxe2x88x92 greater than xe2x80x9c1xe2x80x9dxe2x88x92 greater than xe2x80x9c2xe2x80x9dxe2x88x92 greater than xe2x80x9c1xe2x80x9dxe2x88x92 greater than xe2x80x9c4xe2x80x9dxe2x88x92 greater than xe2x80x9c8xe2x80x9dxe2x88x92 greater than xe2x80x9c6xe2x80x9dxe2x88x92 greater than xe2x80x9c1xe2x80x9dxe2x88x92 greater than xe2x80x9c10xe2x80x9dxe2x88x92 greater than xe2x80x9c3xe2x80x9d, it indicates a transition of the current source cells selected.
As is clear from FIG. 4, with the DWA technique, current source cells based on a new input code xe2x80x9cinxe2x80x9d are sequentially selected from current source cells subsequent to the last of the current source cells selected by its immediately preceding input code xe2x80x9cinxe2x80x9d. That is, with the DWA technique, every current source cell has the same probability of being selected by dynamically changing the current source cells to be selected in response to the input code xe2x80x9cinxe2x80x9d whenever they are output. As a result, if the input code xe2x80x9cinxe2x80x9d is constant, the probability that each current source cell is selected is identical; as such, the average for that output attains such a value that errors due to manufacturing variations among the current source cells are offset each other.
The afore-described DWA technique has been only adopted in digital-to-analog converters with high oversampling rates, such as 16 and 32. That is, the DWA technique has not ever been applied to digital-to-analog converters with oversampling rates as low as 2 or 4, or to Nyquist-rate digital-to-analog converters.
If the DWA technique were employed in a Nyquistrate digital-to-analog converter or the like, the following problem would occur. FIG. 5 shows one example of transitions of current source cells selected by the DWA technique in a 6-bit current output type digital-to-analog converter having 63 current source cells.
Now assume that xe2x80x9c42xe2x80x9d input codes xe2x80x9cinxe2x80x9d. have been inputted consecutively, as shown in FIG. 5. With the DWA technique, three combinations of current source cell selections are repeated. That is, there are three patterns in FIG. 5: one where the respective current source cells of 1st through 42nd counted from left are selected, as shown in the top portion; one where the respective current source cells of 43rd through 63rd and 1st through 21st are selected, as shown in the middle portion; and one where the respective current source cells of 22nd through 63rd are selected, as shown in the bottom portion.
The output current It (=It1) where the 1st through 42nd current source cells are selected in the top portion is xe2x80x9cIs+xcex11xe2x80x9d; the output current It (=It2) where the 43rd through 63rd and 1st through 21st current source cells are selected in the middle portion is xe2x80x9cIs+xcex12xe2x80x9d; and the output current It (=It3) where the 22nd through 63rd current source cells are selected in bottom portion is xe2x80x9cIs+xcex13xe2x80x9d. It should be appreciated that Is represents the value of the current that should be output when there are no manufacturing variations. xcex11, xcex12, and xcex13 denote error currents for the respective selection patterns based on manufacturing variations for each current source cell.
Thus, if the xe2x80x9c42xe2x80x9d input codes xe2x80x9cinxe2x80x9d are continuous, the output current It in response to the xe2x80x9c42xe2x80x9d input codes xe2x80x9cinxe2x80x9d changes from xe2x80x9cIs+xcex11xe2x80x9d to xe2x80x9cIs+xcex12xe2x80x9d to xe2x80x9cIs +xcex13xe2x80x9d, according to the DWA technique. This change involves noise components concentrated at a position of ⅓ the sampling frequency, as shown in FIG. 6. It should be appreciated that xe2x80x9cfsxe2x80x9d in FIG. 6 denotes the sampling frequency.
Incidentally, FIG. 7 shows the noise spectrum where xe2x80x9c1xe2x80x9d input code xe2x80x9cinxe2x80x9d is inputted consecutively; because there are 63 patterns, it can be found that noise is distributed over many frequencies and its value is small.
Accordingly, the smaller the number of repetitive selection patterns (the number of selection patterns required to cycle back), the more difficult it is to average the output currents of the respective current source cells due to manufacturing variations, so that digital-to-analog conversion with high accuracy cannot be expected. A so-called partial DWA technique, where some of the entire current source cells are used to perform the DWA technique, also has a similar problem.
With the afore-described digital-to-analog converter having a high oversampling rate, it was possible to average such a fluctuating output current through a filter circuit. However, with said Nyquist-rate digital-to-analog converter or the like, because sampling is performed near the Nyquist frequency, the filtering circuit that filters noise components at ⅓ the sampling frequency cannot be used, so that averaging cannot be done. Additionally, with a conventional high-sampling-rate digital-to-analog converter, significant noise as shown in FIG. 6 should also be eliminated through a filter circuit; as a result, it is necessary to set stringent noise attenuation characteristics required for the filter circuit, leading to complication of filter circuitry.
The present invention is intended to solve the afore-described problem, and has as its objective to provide a method for selecting cells in response to input codes of a digital-to-analog converter, which allows for reduction of noise based on cyclicality of selection patterns, without being dependent upon the input codes.
One embodiment of the present invention relates to a method for selecting cells in response to input codes of a digital-to-analog converter, wherein when output cells are selected from multiple output cells in response to an input code, output cells based on a new input code are selected from output cells subsequent to the last of the output cells selected by its immediately preceding input code, so that an analog signal is derived from said output cells selected, said method characterized by: the number of said multiple output cells being comprised of a prime number.
Another embodiment of the invention relates to a method for selecting cells in response to input codes of a digital-to-analog converter, wherein: said multiple output cells are classified into cyclically selected cells where output cells based on a new input code are sequentially selected from output cells subsequent to the end of the output cells selected by its immediately preceding input code, and non-cyclically selected cells that are univocally selected in response to a predetermined input code, and wherein the number of said cyclically selected cells is a prime number.
Another embodiment of the invention relates to a method for selecting cells in response to input codes of a digital-to-analog converter wherein: the number of said cyclically selected cells is the greatest prime number among prime numbers equal to or smaller than the number of all output cells.
According to at least one embodiment of the invention because the number of output cells is a prime number, the number of selection patterns required until the selection pattern for selected current output cells cycles back to the same selection pattern is a prime number regardless of the codes inputted, even if input codes of the same value continue.
Thus, even if input codes of the same value continue regardless of codes inputted, the noise based on cyclicality of selection patterns is distributed and its value is reduced, and analog values due to manufacturing variations of output cells can be averaged, thereby allowing for digital-to-analog conversion with a high degree of accuracy.
Additionally, multiple output cells are classified into cyclically selected cells only for a prime number of output cells and non-cyclically selected cells for the rest of the output cells. For those cyclically selected cells, output cells based on a new input code are sequentially selected from output cells subsequent to the last of the output cells selected by its immediately preceding input code. Thus, various embodiments are realized by just slightly modifying an existing digital-to-analog converter without the need for designing a new digital-to-analog converter.
Furthermore, because the number of cyclically selected cells is comprised of the greatest prime number among prime numbers equal to or smaller than the number of all output cells, the number of selection patterns required to cycle back to the same selection pattern can be maximized, and the noise can be distributed over many frequencies and its value can be reduced, thereby allowing the output current due to manufacturing variations among current source cells to be averaged.